brakes and headlights I do not need a diagram for so I left them out.īut seems to me there are ALOT of wires still being ran to get the bike running I am trying to get it down to 2 or 3 wires max per unit that needs power/communication.Īny wire pros here can chime in and let me know if i can simplify things especially the ignition i would like to use a 2 way ignition just on and off and a start button to start it up. Here is he wire diagram and I red out some areas that I know i will be removing and also do not need help with. I am eliminating the fuel pump and using gravity feed I am thinking of getting a whole new fuse panel and running all my own wires from scratch. I recently decided I wanted to do a wire chop and keep the wires to a minimum.Ĭan anyone look over this and maybe help me understand a bit more? PAINLESS PERFORMANCE PRODUCTS Manufacturers Battery Cables, Electrical Connectors, Fuel Injection, Electronic, Fuel Injection, Performance Kits, Wiring, Wiring. I have the bike completely tore apart cleaning and painting parts.
USB 2.I have the wire diagram for my 1987 honda shadow vt700c. USB 2.0 full-speed device/host/OTG controller with on-chip PHY. 2 × CAN (2.0B Active) and SDIO interface Notes : Use if Rewiring a Jeep using a Painless Chassis Harness, a Later Style Manifold, or if Factory Relay is missing Product Fit : Direct Fit Warranty : 1-year Painless limited warranty Quantity Sold : Kit Prop 65 Warning. 
Up to 6 SPIs (45 Mbits/s), 2 with muxed full-duplex I 2S for audio class accuracy via internal audio PLL or external clock This Painless Performance 28 circuit chassis harness is our most widely used customizable automotive wiring harness. Up to 4 USARTs/4 UARTs (11.25 Mbit/s, ISO7816 interface, LIN, IrDA, modem control). Up to 3 × I 2C interfaces (SMBus/PMBus). Up to 168 I/O ports with interrupt capability. Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input. General-purpose DMA: 16-stream DMA controller with FIFOs and burst support. 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode. V BAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM. 
32 kHz oscillator for RTC with calibration.Internal 16 MHz factory-trimmed RC (1% accuracy).
1.7 V to 3.6 V application supply and I/Os.
Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D). Toggle Switch Panel Non-Fused Rocker Switch Panel 4 Switch. LCD-TFT controller with fully programmable resolution (total width up to 4096 pixels, total height up to 2048 lines and pixel clock up to 83 MHz) Painless Performance 50404 - Painless Performance Switch Panels. LCD parallel interface, 8080/6800 modes. Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, Compact Flash/NOR/NAND memories. Up to 256+4 KB of SRAM including 64-KB of CCM (core coupled memory) data RAM. Up to 2 MB of Flash memory organized into two banks allowing read-while-write. Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions.
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